1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more specifically to a multilevel interconnection in a semiconductor device and a method for forming the same.
2. Description of Related Art
With an increased integrated density and an elevated operation speed of the semiconductor device, microfabrication of an interconnection layer has become remarkable. Therefore, since a fine pattern is formed, a capacitance between interconnections of the same level increases, with the result that the characteristics of the semiconductor device is significantly deteriorated. This capacitance between interconnections will be called a "line-to-line capacitance" in this specification.
In order to reduce the line-to-line capacitance, it was proposed to use an insulator film of a lower dielectric constant. For example, Japanese Patent Application Pre-examination Publication No. JP-A-62-005643, (the content of which is incorporated by reference in its entirety into this application, and also an English abstract of JP-A-62-005643 is available from the Japanese Patent Office and the content of the English abstract of JP-A-62-005643 is also incorporated by reference in its entirety into this application), proposes to form a cavity between adjacent interconnections of the same level, thereby to reduce the line-to-line capacitance. This example is shown in FIG. 1A.
Furthermore, Shin-Puu Jeng, et al. "A Planarized Multievel Interconnect Scheme With Embedded Low-Dielectric-Constant Polymers For Sub-Quarter-Micron Applications", 1997 Symposium on VLSI Technology Digest of Technical Papers, pp. 73-74, (the content of which is incorporated by reference in its entirety into this application) proposes to form an organic film of a lower dielectric constant only between adjacent interconnections of the same level. This example is shown in FIG. 1B.
In FIGS. 1A and 1B, Reference Numeral 1 designates a substrate, and Reference Numeral 2 indicates an insulator layer formed on the substrate 1. Reference Numeral 3 shows lower level interconnections 3 formed on the insulator layer 2, and Reference Numerals 4a and 4b denote insulator films formed to cover the lower level interconnections 3. Reference Numeral 5 designates a cavity formed between adjacent lower level interconnection 3, and Reference Numeral 6 indicates a metal pillar extending through the insulator films 4a and 4b to contact with a target one of the lower level interconnection 3. Reference Numeral 7 shows upper level interconnections formed on the insulator film 4b, and one of the upper level interconnections 7 is connected to the metal pillar 7. Reference Numeral 8 denotes an organic film 8, and Reference Numeral 10 designates a hollow formed in the metal pillar 7.
In these prior art examples, if the spacing between interconnections is on the order of sub-microns or less, the metal pillar 6 for electrically connecting the upper level interconnection 7 and the lower level interconnection 3 has often become formed to deviate from the lower level interconnection 3, so that a portion of the metal pillar 6 extends into a region between two adjacent lower level interconnections 3.
As a result, in the example shown in FIG. 1A, the metal pillar 6 reaches the cavity 5 in a deviated portion of the metal pillar 6, so that a gas retained in the cavity 5 is discharged to create the hollow 10 in the metal pillar 6. This results in an increased resistance of a connection resistance and in a lowered reliability. Alternatively, the metal pillar 5 is formed to fill up the cavity 5 between the lower level interconnections 3, which results in an increased leak current between the lower level interconnections 3.
In addition, in the example shown in FIG. 1B, the metal pillar 6 contacts with the organic film 8 in a deviated portion of the metal pillar 6, so that because of a degasification of the organic film 8, the hollow 10 is formed in the metal pillar 6. Similarly, this results in an increased resistance of a connection resistance and in a lowered reliability.